68681
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Dual Asynchronous Receiver / Transmitter
Pinout
DIP40 +---\/---+ RS1 | 1 40| Vcc IP3 | 2 39| IP4 RS2 | 3 38| IP5 IP1 | 4 37| *IACK RS3 | 5 36| IP2 RS4 | 6 35| *CS IP0 | 7 34| *RESET R/*W | 8 33| X2 *DTACK | 9 32| X1/CLK RXDB |10 31| RxDA TxDB |11 30| TxDA OP1 |12 29| OP0 OP3 |13 28| OP2 OP5 |14 27| OP4 OP7 |15 26| OP6 D1 |16 25| D0 D3 |17 24| D2 D5 |18 23| D4 D7 |19 22| D6 GND |20 21| *IRQ +--------+
Frequency
DIP40
Set reader to FREQ, put black probe to GND, red probe to 32 AND 33 to measure CPU clock
External links
Files
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m68681 Datasheet