2621

Universal Sync Generator (PAL)

Pinout

DIP17
         +---\/---+
  *CSYNC | 1    14| Vcc
    VRST | 2    13| OE
   CBLNK | 3    12| CLOCK
     VSR | 4    11| PCK
     CBF | 5    10| CK4
    HRST | 6     9| CK2
     Vss | 7     8| RESET
         +--------+

Frequency

DIP14
Set reader to FREQ, put black probe to GND, red probe to 12 to measure CPU clock

External links

2650 family page on Wikipedia

Files

• 

  2621 Datasheet