SRAM 256 x 1: Difference between revisions
From Citylan
Jump to navigationJump to search
mNo edit summary |
mNo edit summary |
||
Line 3: | Line 3: | ||
256b, 100hex1 bit | 256b, 100hex1 bit | ||
<pre> | <pre> | ||
N82S16 | |||
</pre> | </pre> | ||
<pre> | <pre> |
Revision as of 17:32, 14 June 2011
Bipolar RAM 256 x 1 (DIP16, 300mil)
256b, 100hex1 bit
N82S16
+--\/--+ A1 |1 16| Vcc A0 |2 15| A2 CE1/|3 14| A3 CE2/|4 13| DI CE3/|5 12| WE/ DO/ |6 11| A7 A4 |7 10| A6 GND |8 9| A5 +------+