SRAM 128k x 8: Difference between revisions
From Citylan
Jump to navigationJump to search
mNo edit summary |
mNo edit summary |
||
| Line 4: | Line 4: | ||
<pre> | <pre> | ||
AS7C1024 | AS7C1024 | ||
D431000AGW | |||
K6X1008C2D | K6X1008C2D | ||
CXK581000 | CXK581000 | ||
Revision as of 18:59, 12 May 2010
SRAM 128k x 8 (DIP32, 600mil)
1Mb, 128KB, 20000hex8 bit
AS7C1024 D431000AGW K6X1008C2D CXK581000 LP611024CS MX66C1024MC TC551001 V62C5181024L
+--\/--+
N.C.|1 32| Vcc
A16 |2 31| A15
A14 |3 30| CE2
A12 |4 29| WE/
A7 |5 28| A13
A6 |6 27| A9
A5 |7 26| A8
A4 |8 25| A11
A3 |9 24| OE/
A2 |10 23| A10
A1 |11 22| CE1/
A0 |12 21| IO7
IO0 |13 20| IO6
IO1 |14 19| IO5
IO2 |15 18| IO4
GND |16 17| IO3
+------+
