8224: Difference between revisions
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Revision as of 14:11, 9 November 2017
Clock Generator and Driver
Pinout
DIP16 +---\/---+ RESET | 1 40| Vcc *RESIN | 2 39| XTAL1 RDYIN | 3 38| XTAL2 READY | 4 37| TANK SYNC | 5 36| OSC Ø2(TTL) | 6 35| Ø1 *STSTB | 7 34| Ø2 GND | 8 33| Vdd +--------+
Frequency
DIP16
Set reader to FREQ, put black probe to GND, red probe to 6,10,11,12 to measure output clocks
External links
Clock generator page on Wikipedia
8224 page on CPU-World
Files
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DP8224 Datasheet