SRAM 256k x 4: Difference between revisions
From Citylan
Jump to navigationJump to search
m (1 revision) |
mNo edit summary |
||
| Line 27: | Line 27: | ||
[[Category:RAM]] | [[Category:RAM]] | ||
[[Category:DIP32]] | |||
Revision as of 12:53, 7 October 2009
SRAM 256K x 4 (DIP32, 600mil)
1Mb, 128KB, 40000hex4 bit
pinout
+--\/--+
N.C.|1 32| Vcc
A16 |2 31| A15
A17 |3 30| A3
A0 |4 29| A4
A1 |5 28| A5
A2 |6 27| A6
A10 |7 26| A7
A11 |8 25| A8
A12 |9 24| N.C.
A13 |10 23| I0
A14 |11 22| I1
A9 |12 21| 00
I3 |13 20| O1
I2 |14 19| O2
CE/ |15 18| O3
GND |16 17| WE/
+------+
