DRAM 256k x 8: Difference between revisions

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SRAM 256k x 8 (DIP32, 600mil)
{| style="float: right;" border="1" cellpadding="4" cellspacing="0" class="sortable"
|+ style="background:silver" | Cross-Reference
!BRAND
!TAG
!NUMBER
!PIN COUNT
!OUTPUT
!MARKINGS
|-
|Samsung || KM || 41464 ||  ||  || KM64257A KM64257AL KM64257B KM64258B KM64259B KM64260B
|}


2Mb, 256KB, 40000hex8 bit
'''Dynamic Random-Access Memory 256K x 8'''


=Size=
{| border="1" cellpadding="4" cellspacing="0"
|-align="left"
!bit
!Byte (unpadded)
!Hex
|-
|2Mb || 256KB || 200000hex
|}
=Pinout=
<pre>
<pre>
KM428C256
SOJ40 - TSOP40
        +---\/---+
    Vss | 1    40| Vss
      SC | 2    39| SDQ7
    SDQ0 | 3    38| SDQ6
    SDQ1 | 4    37| SDQ5
    SDQ2 | 5    36| SDQ4
    SDQ3 | 6    35| *SE
*DT/*OE | 7    34| W7/DQ7
  W0/DQ0 | 8    33| W6/DQ6
  W1/DQ1 | 9    32| W5/DQ5
  W2/DQ2 |10    31| W4/DQ4
  W3/DQ3 |11    30| Vss
*WB/*WE |12    29| DSF
    Vss |13    28| NC
    *RAS |14    27| *CAS
      A8 |15    26| QSF
      A7 |16    25| A0
      A6 |17    24| A1
      A5 |18    23| A2
      A4 |19    22| A3
    Vcc |20    21| Vss
        +--------+
 
ZIP40
          ^
  Vss  1 |
          |  2 W4/DQ4
W5/DQ5  3 |
          |  4 W6/DQ6
W7/DQ7  5 |
          |  6 *SE
  SDQ5  7 |
          |  8 SDQ4
  SDQ7  9 |
          | 10 SDQ6
  Vss 11 |
          | 12 Vcc
    SC 13 |
          | 14 SDQ0
  DQ1 15 |
          | 16 SDQ2
  DQ3 17 |
          | 18 *DT/*OE
W0/DQ0 19 |
          | 20 W1/DQ1
W2/DQ2 21 |
          | 22 W3/DQ3
  Vss 23 |
          | 24 *WB/*WE
  *RAS 25 |
          | 26 A8
    A7 27 |
          | 28 A6
    A5 29 |
          | 30 A4
    A3 31 |
          | 32 Vcc
    A2 33 |
          | 34 A1
    A0 35 |
          | 36 QSF
  GND 37 |
          | 38 *CAS
    NC 39 |
          | 40 DSF
          -
</pre>
</pre>
<pre>
    +--\/--+
N.C.|1  32| Vcc
A16 |2  31| A15
A14 |3  30| CE2
A12 |4  29| WE/
A7  |5  28| A13
A6  |6  27| A9
A5  |7  26| A8
A4  |8  25| A11
A3  |9  24| OE/
A2  |10  23| A10
A1  |11  22| CS1/
A0  |12  21| IO7
IO0 |13  20| IO6
IO1 |14  19| IO5
IO2 |15  18| IO4
GND |16  17| IO3
    +------+</pre>


[[Image:dip32-600mil.jpg]]
=External links=
[https://en.wikipedia.org/wiki/Dynamic_random-access_memory DRAM page on wikipedia]
 
=Files=
<gallery widths="150px">
File:km428c256.pdf|KM428C256 Datasheet
</gallery>


[[Category:RAM]]
[[Category:RAM]]
[[Category:DIP32]]
[[Category:SOJ40]]
[[Category:TSOP40]]
[[Category:ZIP40]]

Revision as of 09:44, 19 February 2017

Cross-Reference
BRAND TAG NUMBER PIN COUNT OUTPUT MARKINGS
Samsung KM 41464 KM64257A KM64257AL KM64257B KM64258B KM64259B KM64260B

Dynamic Random-Access Memory 256K x 8

Size

bit Byte (unpadded) Hex
2Mb 256KB 200000hex

Pinout

SOJ40 - TSOP40
         +---\/---+
     Vss | 1    40| Vss
      SC | 2    39| SDQ7
    SDQ0 | 3    38| SDQ6
    SDQ1 | 4    37| SDQ5
    SDQ2 | 5    36| SDQ4
    SDQ3 | 6    35| *SE
 *DT/*OE | 7    34| W7/DQ7
  W0/DQ0 | 8    33| W6/DQ6
  W1/DQ1 | 9    32| W5/DQ5
  W2/DQ2 |10    31| W4/DQ4
  W3/DQ3 |11    30| Vss
 *WB/*WE |12    29| DSF
     Vss |13    28| NC
    *RAS |14    27| *CAS
      A8 |15    26| QSF
      A7 |16    25| A0
      A6 |17    24| A1
      A5 |18    23| A2
      A4 |19    22| A3
     Vcc |20    21| Vss
         +--------+

ZIP40
          ^
   Vss  1 |
          |  2 W4/DQ4
W5/DQ5  3 |
          |  4 W6/DQ6
W7/DQ7  5 |
          |  6 *SE
  SDQ5  7 |
          |  8 SDQ4
  SDQ7  9 |
          | 10 SDQ6
   Vss 11 |
          | 12 Vcc
    SC 13 |
          | 14 SDQ0
   DQ1 15 |
          | 16 SDQ2
   DQ3 17 |
          | 18 *DT/*OE
W0/DQ0 19 |
          | 20 W1/DQ1
W2/DQ2 21 |
          | 22 W3/DQ3
   Vss 23 |
          | 24 *WB/*WE
  *RAS 25 |
          | 26 A8
    A7 27 |
          | 28 A6
    A5 29 |
          | 30 A4
    A3 31 |
          | 32 Vcc
    A2 33 |
          | 34 A1
    A0 35 |
          | 36 QSF
   GND 37 |
          | 38 *CAS
    NC 39 |
          | 40 DSF
          -

External links

DRAM page on wikipedia

Files