6844: Difference between revisions

From Citylan
Jump to navigationJump to search
mNo edit summary
Line 40: Line 40:


[[Category:CPU]]
[[Category:CPU]]
[[Category:DIP40]]

Revision as of 16:13, 29 September 2009

Direct Memory Access Controller (DMAC)

Pinout

DIP40
           +---\/---+
       Vss | 1    40| E
*CS/Tx AKB | 2    39| *RESET
      R/*W | 3    38| DGRNT
        A0 | 4    37| *DRQ1
        A1 | 5    36| *DRQ2
        A2 | 6    35| Tx AKA
        A3 | 7    34| *Tx STB
        A4 | 8    33| *IRQ/*DEND
        A5 | 9    32| Tx RQ0
        A6 |10    31| Tx RQ1
        A7 |11    30| Tx RQ2
        A8 |12    29| Tx RQ3
        A9 |13    28| D0
       A10 |14    27| D1
       A11 |15    26| D2
       A12 |16    25| D3
       A13 |17    24| D4
       A14 |18    23| D5
       A15 |19    22| D6
       Vcc |20    21| D7
           +--------+

Frequency

No frequency to check

External links

"6809 support chips" page on CPU-World

Files