6545: Difference between revisions

From Citylan
Jump to navigationJump to search
(Created page with "'''CRT Controller (CRTC)''' =Pinout= <pre> DIP40 +---\/---+ Vss | 1 40| VSYNC *RESET | 2 39| HSYNC LPEN | 3 38| RA0 CC0/MA0 | 4 37| RA1 CC1/...")
 
 
Line 36: Line 36:
=Files=
=Files=
<gallery widths="150px">
<gallery widths="150px">
File:6545.pdf|R6545 Datasheet
File:6545-1.pdf|R6545 Datasheet 1st part
File:6545-2.pdf|R6545 Datasheet 2nd part
</gallery>
</gallery>


[[Category:Other Chips]]
[[Category:Other Chips]]
[[Category:DIP40-600mil]]
[[Category:DIP40-600mil]]

Latest revision as of 14:37, 24 January 2021

CRT Controller (CRTC)

Pinout

DIP40
         +---\/---+
     Vss | 1    40| VSYNC
  *RESET | 2    39| HSYNC
    LPEN | 3    38| RA0
 CC0/MA0 | 4    37| RA1
 CC1/MA1 | 5    36| RA2
 CC2/MA2 | 6    35| RA3
 CC3/MA3 | 7    34| RA4
 CC4/MA4 | 8    33| D0
 CC5/MA5 | 9    32| D1
 CC6/MA6 |10    31| D2
 CC7/MA7 |11    30| D3
 CR0/MA8 |12    29| D4
 CR1/MA9 |13    28| D5
CR2/MA10 |14    27| D6
CR3/MA11 |15    26| D7
CR4/MA12 |16    25| *CS
CR5/MA13 |17    24| RS
 Dspl En |18    23| Ø2
  CURSOR |19    22| R/*W
     Vcc |20    21| CCLK
         +--------+

Frequency

Set reader to FREQ, put black probe to GND, red probe to 21 and 23 to measure CPU clock, to 39 for HSYNC and to 40 for VSYNC

External links

Video Display Controller page on Wikipedia

Files