SRAM 64 x 8: Difference between revisions

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(Created page with "{| style="float: right;" border="1" cellpadding="4" cellspacing="0" class="sortable" |+ style="background:silver" | Cross-Reference !BRAND !TAG !NUMBER !PIN COUNT !OUTPUT !MAR...")
 
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DIP20
DIP20
         +---\/---+
         +---\/---+
        | 1    20| I/O6
    I/O7 | 1    20| I/O6
        | 2    19| I/O5
      A5 | 2    19| I/O5
        | 3    18| NC
      A0 | 3    18| NC
        | 4    17| I/O4
      A1 | 4    17| I/O4
        | 5    16| OE
      A2 | 5    16| OE
     GND | 6    15| Vcc
     GND | 6    15| Vcc
        | 7    14| *CE
      A4 | 7    14| *CE
        | 8    13| R/*W
      A3 | 8    13| R/*W
     I/O0 | 9    12| I/O3
     I/O0 | 9    12| I/O3
     I/O1 | 10  11| I/O2
     I/O1 | 10  11| I/O2

Revision as of 12:46, 13 April 2020

Cross-Reference
BRAND TAG NUMBER PIN COUNT OUTPUT MARKINGS
Texas Instruments SN 4036 20 TS TMS4036 TMS4036-1 TMS4036-2

Static Random-Access Memory 64 x 8 (DIP20, 300mil)

Size

bit Byte Hex
512b 64B 200hex

Pinout

DIP20
         +---\/---+
    I/O7 | 1    20| I/O6
      A5 | 2    19| I/O5
      A0 | 3    18| NC
      A1 | 4    17| I/O4
      A2 | 5    16| OE
     GND | 6    15| Vcc
      A4 | 7    14| *CE
      A3 | 8    13| R/*W
    I/O0 | 9    12| I/O3
    I/O1 | 10   11| I/O2
         +--------+

External links

SRAM page on wikipedia

Files