V30: Difference between revisions

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[[Category:CPU]]
[[Category:CPU]]
[[Category:DIP40]]
[[Category:DIP40]]
<pre>
    +--------\/--------+
1 -|gnd            vcc|- 40
2 -|ad14          ad15|- 39
3 -|ad13        a16/s3|- 38
4 -|ad12        a17/s4|- 37
5 -|ad11        a18/s5|- 36
6 -|ad10        a19/s6|- 35
7 -|ad9        /bhe/s7|- 34
8 -|ad8          mn/mx|- 33
9 -|ad7            /rd|- 32
10 -|ad6  (hold) gt0/rq|- 31
11 -|ad5  (hlda) gt1/rq|- 30
12 -|ad4  (/wr)  /lock|- 29
13 -|ad3  (m/io)    /s2|- 28
14 -|ad2  (dt/r)    /s1|- 27
15 -|ad1  (/den)    /s0|- 26
16 -|ad0  (ale)    qs0|- 25
17 -|nmi  (/inta)  qs1|- 24
18 -|intr        /test|- 23
19 -|clk          ready|- 22
20 -|gnd          reset|- 21
    +------------------+</pre>

Revision as of 13:37, 23 October 2009

16-bit Microprocessor

Pinout

DIP40
         +---\/---+
      IC | 1    40| Vdd
    AD14 | 2    39| AD15
    AD13 | 3    38| A16/PS0
    AD12 | 4    37| A17/PS1
    AD11 | 5    36| A18/PS2
    AD10 | 6    35| A19/PS3
     AD9 | 7    34| *UBE
     AD8 | 8    33| S/*LG
     AD7 | 9    32| *RD
     AD6 |10    31| HLDRQ (*RQ/*AK0)
     AD5 |11    30| HLDAK (*RQ/*AK1)
     AD4 |12    29| *WR (BUSLOCK)
     AD3 |13    28| *IO/M (BS2)
     AD2 |14    27| *BUFR/W (BS1)
     AD1 |15    26| *BUFEN (BS0)
     AD0 |16    25| ASTB (QS0)
     NMI |17    24| *INTAK (QS1)
     INT |18    23| *POLL
     CLK |19    22| READY
     GND |20    21| RESET
         +--------+

Frequency

DIP40
Set reader to FREQ, put black probe to GND, red probe to 19 to measure CPU clock

External links

V30 page on Wikipedia
V30 page on CPU-World

Files

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