2621: Difference between revisions
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'''Universal Sync Generator (PAL)''' | '''Universal Sync Generator (PAL)''' | ||
also Signetics CT430I | |||
=Pinout= | =Pinout= | ||
<pre> | <pre> | ||
DIP14 | |||
+---\/---+ | +---\/---+ | ||
*CSYNC | 1 14| Vcc | *CSYNC | 1 14| Vcc |
Latest revision as of 20:03, 1 June 2021
Universal Sync Generator (PAL) also Signetics CT430I
Pinout
DIP14 +---\/---+ *CSYNC | 1 14| Vcc VRST | 2 13| OE CBLNK | 3 12| CLOCK VSR | 4 11| PCK CBF | 5 10| CK4 HRST | 6 9| CK2 Vss | 7 8| RESET +--------+
Frequency
DIP14
Set reader to FREQ, put black probe to GND, red probe to 12 to measure CPU clock
External links
Files
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2621 Datasheet