SH7604: Difference between revisions
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(Created page with "'''32-bit Microprocessor''' =Pinout= <pre> QFP144 +-----------------------------------------------------------------+ | 1 D11 | 37 A6 | 73 *CS1 | 109 CAP...") |
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=Files= | =Files= | ||
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File:sh7604.pdf|SH-2 Datasheet | File:sh7604-1.pdf|SH-2 Datasheet (part 1) | ||
File:sh7604-2.pdf|SH-2 Datasheet (part 2) | |||
</gallery> | </gallery> | ||
[[Category:CPU]] | [[Category:CPU]] | ||
[[Category:QFP144-(36x36)-20x20mm]] | [[Category:QFP144-(36x36)-20x20mm]] | ||
Latest revision as of 17:04, 25 April 2021
32-bit Microprocessor
Pinout
QFP144 +-----------------------------------------------------------------+ | 1 D11 | 37 A6 | 73 *CS1 | 109 CAP2 | | 2 D12 | 38 A7 | 74 *CS2 | 110 MD2 | | 3 D13 | 39 A8 | 75 *CS3 | 111 *CKRACK | | 4 Vcc | 40 Vcc | 76 *BS | 112 *CKPREQ/CKM | | 5 D14 | 41 A9 | 77 RD/*WR | 113 Vcc | | 6 Vss | 42 Vss | 78 Vss | 114 EXTAL | | 7 D15 | 43 A10 | 79 *RAS/*CE | 115 Vss | | 8 D16 | 44 A11 | 80 *CAS/*OE | 116 XTAL | | 9 D17 | 45 A12 | 81 *CASHH/DQMUU/*WE3 | 117 MD3 | | 10 D18 | 46 A13 | 82 *CASHL/DQMUL/*WE2 | 118 CKIO | | 11 D19 | 47 A14 | 83 *CASLH/DQMLU/*WE1 | 119 MD4 | | 12 Vcc | 48 Vcc | 84 Vcc | 120 MD5 | | 13 D20 | 49 A15 | 85 *CASLL/DQMLL/*WE0 | 121 Vss | | 14 Vss | 50 Vss | 86 Vss | 122 *RES | | 15 D21 | 51 A16 | 87 *RD | 123 Vcc | | 16 D22 | 52 A17 | 88 CKE | 124 *IVECF | | 17 D23 | 53 A18 | 89 *WAIT | 125 NMI | | 18 Vcc | 54 Vcc | 90 NC | 126 *IRL3 | | 19 D24 | 55 A19 | 91 Vss | 127 *IRL2 | | 20 Vss | 56 Vss | 92 *BACK/*BRLS | 128 *IRL1 | | 21 D25 | 57 A20 | 93 *BREQ/*BGR | 129 *IRL0 | | 22 D26 | 58 A21 | 94 *WDTOVF | 130 D0 | | 23 D27 | 59 A22 | 95 FTOB | 131 D1 | | 24 Vcc | 60 Vcc | 96 Vcc | 132 Vcc | | 25 D28 | 61 A23 | 97 FTOA | 133 D2 | | 26 Vss | 62 Vss | 98 Vss | 134 Vss | | 27 D29 | 63 A24 | 99 FTI | 135 D3 | | 28 D30 | 64 A25 | 100 FTCI | 136 D4 | | 29 D31 | 65 A26 | 101 RXD | 137 D5 | | 30 A0 | 66 DACK0 | 102 TXD | 138 D6 | | 31 A1 | 67 Vcc | 103 SCK | 139 Vcc | | 32 A2 | 68 DACK1 | 104 Vcc(PLL) | 140 D7 | | 33 Vss | 69 Vss | 105 MD0 | 141 Vss | | 34 A3 | 70 DREQ0 | 106 Vss(PLL) | 142 D8 | | 35 A4 | 71 DREQ1 | 107 MD1 | 143 D9 | | 36 A5 | 72 *CS0 | 108 CAP1 | 144 D10 | +-----------------------------------------------------------------+
Frequency
QFP144
Set reader to FREQ, put black probe to GND, red probe to 114,116 to measure CPU clock
Files
-
SH-2 Datasheet (part 1)
-
SH-2 Datasheet (part 2)
