68000: Difference between revisions
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| Line 10: | Line 10: | ||
D1 |4 61| D8 | D1 |4 61| D8 | ||
D0 |5 60| D9 | D0 |5 60| D9 | ||
*AS |6 59| D10 | |||
*UDS |7 58| D11 | |||
*LDS |8 57| D12 | |||
R/ | R/*W |9 56| D13 | ||
*DTACK |10 55| D14 | |||
*BG |11 54| D15 | |||
*BGACK |12 53| GND | |||
*BR |13 52| A23 | |||
VCC |14 51| A22 | VCC |14 51| A22 | ||
CLK |15 50| A21 | CLK |15 50| A21 | ||
GND |16 49| VCC | GND |16 49| VCC | ||
*HALT |17 48| A20 | |||
*RST |18 47| A19 | |||
*VMA |19 46| A18 | |||
E |20 45| A17 | E |20 45| A17 | ||
*VPA |21 44| A16 | |||
*BERR |22 43| A15 | |||
*IPL2 |23 42| A14 | |||
*IPL1 |24 41| A13 | |||
*IPL0 |25 40| A12 | |||
FC2 |26 39| A11 | FC2 |26 39| A11 | ||
FC1 |27 38| A10 | FC1 |27 38| A10 | ||
| Line 40: | Line 40: | ||
68000, 68010 ( | 68000, 68010 (LCC68) | ||
+---------------------------------------------------------------+ | +---------------------------------------------------------------+ | ||
| 10 | | 10 *DTACK | 27 *IPL0 | 44 A13 | 61 D12 | | ||
| 11 | | 11 *BG | 28 FC2 | 45 A14 | 62 D11 | | ||
| 12 | | 12 *BGACK | 29 FC1 | 46 A15 | 63 D10 | | ||
| 13 | | 13 *BR | 30 FC0 | 47 A16 | 64 D9 | | ||
| 14 VCC | 31 | 48 A17 | 65 D8 | | | 14 VCC | 31 | 48 A17 | 65 D8 | | ||
| 15 CLK | 32 A1 | 49 A18 | 66 D7 | | | 15 CLK | 32 A1 | 49 A18 | 66 D7 | | ||
| Line 51: | Line 51: | ||
| 17 GND | 34 A3 | 51 A20 | 68 D5 | | | 17 GND | 34 A3 | 51 A20 | 68 D5 | | ||
| 18 | 35 A4 | 52 VCC | 1 D4 | | | 18 | 35 A4 | 52 VCC | 1 D4 | | ||
| 19 | | 19 *HALT | 36 A5 | 53 A21 | 2 D3 | | ||
| 20 | | 20 *RST | 37 A6 | 54 A22 | 3 D2 | | ||
| 21 | | 21 *VMA | 38 A7 | 55 A23 | 4 D1 | | ||
| 22 E | 39 A8 | 56 GND | 5 D0 | | | 22 E | 39 A8 | 56 GND | 5 D0 | | ||
| 23 | | 23 *VPA | 40 A9 | 57 GND | 6 *AS | | ||
| 24 | | 24 *BERR | 41 A10 | 58 D15 | 7 *UDS | | ||
| 25 | | 25 *IPL2 | 42 A11 | 59 D14 | 8 *LDS | | ||
| 26 | | 26 *IPL1 | 43 A12 | 60 D13 | 9 R/*W | | ||
+---------------------------------------------------------------+ | +---------------------------------------------------------------+ | ||
</pre> | </pre> | ||
| Line 64: | Line 64: | ||
=Frequency= | =Frequency= | ||
'''DIP64'''<br> | '''DIP64'''<br> | ||
Set reader to FREQ, put black probe to GND, red probe to 15 to measure CPU clock<BR> | |||
Guru's comment: 15, 23/24/25(vsync sometimes) | Guru's comment: 15, 23/24/25(vsync sometimes) | ||
''' | '''LCC68'''<br> | ||
Set reader to FREQ, put black probe to GND, red probe to 15 to measure CPU clock<br> | |||
Guru's comment: 16, 25/26/27(vsync sometimes) | Guru's comment: 16, 25/26/27(vsync sometimes) | ||
| Line 78: | Line 78: | ||
<gallery widths="150px"> | <gallery widths="150px"> | ||
File:68000.pdf|Signetics 68000 Datasheet | File:68000.pdf|Signetics 68000 Datasheet | ||
File:mc68hc000.pdf|MC68HC000 Datasheet | |||
File:scn68000.pdf|SCN68000 Datasheet | |||
</gallery> | </gallery> | ||
[[Category:CPU]] | [[Category:CPU]] | ||
[[Category:DIP64-750mil]] | |||
[[Category:LCC68]] | |||
Latest revision as of 10:27, 12 September 2018
16/32-bit Microprocessor
Pinout
68000, 68010 (DIP64)
+---\/---+
D4 |1 64| D5
D3 |2 63| D6
D2 |3 62| D7
D1 |4 61| D8
D0 |5 60| D9
*AS |6 59| D10
*UDS |7 58| D11
*LDS |8 57| D12
R/*W |9 56| D13
*DTACK |10 55| D14
*BG |11 54| D15
*BGACK |12 53| GND
*BR |13 52| A23
VCC |14 51| A22
CLK |15 50| A21
GND |16 49| VCC
*HALT |17 48| A20
*RST |18 47| A19
*VMA |19 46| A18
E |20 45| A17
*VPA |21 44| A16
*BERR |22 43| A15
*IPL2 |23 42| A14
*IPL1 |24 41| A13
*IPL0 |25 40| A12
FC2 |26 39| A11
FC1 |27 38| A10
FC0 |28 37| A9
A1 |29 36| A8
A2 |30 35| A7
A3 |31 34| A6
A4 |32 33| A5
+--------+
68000, 68010 (LCC68)
+---------------------------------------------------------------+
| 10 *DTACK | 27 *IPL0 | 44 A13 | 61 D12 |
| 11 *BG | 28 FC2 | 45 A14 | 62 D11 |
| 12 *BGACK | 29 FC1 | 46 A15 | 63 D10 |
| 13 *BR | 30 FC0 | 47 A16 | 64 D9 |
| 14 VCC | 31 | 48 A17 | 65 D8 |
| 15 CLK | 32 A1 | 49 A18 | 66 D7 |
| 16 GND | 33 A2 | 50 A19 | 67 D6 |
| 17 GND | 34 A3 | 51 A20 | 68 D5 |
| 18 | 35 A4 | 52 VCC | 1 D4 |
| 19 *HALT | 36 A5 | 53 A21 | 2 D3 |
| 20 *RST | 37 A6 | 54 A22 | 3 D2 |
| 21 *VMA | 38 A7 | 55 A23 | 4 D1 |
| 22 E | 39 A8 | 56 GND | 5 D0 |
| 23 *VPA | 40 A9 | 57 GND | 6 *AS |
| 24 *BERR | 41 A10 | 58 D15 | 7 *UDS |
| 25 *IPL2 | 42 A11 | 59 D14 | 8 *LDS |
| 26 *IPL1 | 43 A12 | 60 D13 | 9 R/*W |
+---------------------------------------------------------------+
Frequency
DIP64
Set reader to FREQ, put black probe to GND, red probe to 15 to measure CPU clock
Guru's comment: 15, 23/24/25(vsync sometimes)
LCC68
Set reader to FREQ, put black probe to GND, red probe to 15 to measure CPU clock
Guru's comment: 16, 25/26/27(vsync sometimes)
External links
68000 page on Wikipedia
68000 page on CPU-World
Files
-
Signetics 68000 Datasheet
-
MC68HC000 Datasheet
-
SCN68000 Datasheet
