SRAM 4k x 4: Difference between revisions

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SRAM 4K x 4 (DIP20, 300mil)
{| style="float: right;" border="1" cellpadding="4" cellspacing="0" class="sortable"
|+ style="background:silver" | Cross-Reference
!BRAND
!TAG
!NUMBER
!PIN COUNT
!OUTPUT
!MARKINGS
|-
|Cypress || CY || 7C168 || DIP20 || TS || CY7C168A
|-
|Integrated Dev. Tech. || IDT || 6168 || DIP20 || . || IDT6168SA IDT6168LA
|-
|Micron || MT || 1606 || DIP24 || . || MT5C1606
|-
|Micron || MT || 1607 || DIP24 || . || MT5C1607
|-
|Pyramid Semiconductor || P4C || 168 || DIP20 || . || P4C168 P4C168L
|-
|Pyramid Semiconductor || P4C || 169 || DIP20 || . || P4C169
|-
|Pyramid Semiconductor || P4C || 170 || DIP22 || . || P4C170
|-
|Pyramid Semiconductor || P4C || 1681 || DIP24 LCC28 || . || P4C1681
|-
|Pyramid Semiconductor || P4C || 1682 || DIP24 LCC28 || . || P4C1682
|-
|Sony || CXK || 5416 || DIP20 || TS || CXK5416P
|}


16Kb, 2KB, 1000hex4 bit
'''Static Random-Access Memory 4K x 4 (DIP20, 300mil)(DIP22, 300mil)(DIP24, 300mil)'''


pinout
=Size=
{| border="1" cellpadding="4" cellspacing="0"
|-align="left"
!bit
!Byte (padded 0000xxxx)
!Byte (unpadded)
!Hex
|-
|4Kb || 4KB || 2KB || 1000hex
|}
 
=Pinout=
<pre>
<pre>
    +--\/--+
DIP24
A4 |1   20| Vcc
        +---\/---+
A5 |2   19| A3
      A4 | 1    24| Vcc
A6 |3   18| A2
      A5 | 2    23| A3
A7 |4   17| A1
      A6 | 3    22| A2
A8 |5   16| A0
      A7 | 4    21| A1
A9 |6   15| IO0
      A8 | 5    20| A0
A10 |7   14| IO1
      A9 | 6    19| D4
A11 |8   13| IO2
    A10 | 7    18| D3
CE/ |9  12| IO3
    A11 | 8    17| Q4
GND |10  11| WE/
      D1 | 9    16| Q3
    +------+</pre>
      D2 |10    15| Q2
    *CE |11    14| Q1
    GND |12    13| *WE
        +--------+
 
DIP22 (only P4C170)
        +---\/---+
      A0 | 1    22| Vcc
      A1 | 2    21| A11
      A2 | 3    20| A10
      A3 | 4    19| A9
      A4 | 5    18| A8
      A5 | 6    17| NC
      A6 | 7    16| I/O4
      A7 | 8    15| I/O3
    *CS | 9    14| I/O2
    *OE |10    13| I/O1
    GND |11    12| *WE
        +--------+
 
DIP20
        +---\/---+
      A4 | 1   20| Vcc
      A5 | 2   19| A3
      A6 | 3   18| A2
      A7 | 4   17| A1
      A8 | 5   16| A0
      A9 | 6   15| I/O0
    A10 | 7   14| I/O1
    A11 | 8   13| I/O2
    *CE | 9    12| I/O3
    GND |10    11| *WE
        +--------+
 
LCC28 (only P4C1681 P4C1682)
+--------------------------------------+
|  5 A4  | 12 I2  | 19 04  | 26 A10  |
|  6 A5  | 13 *CE  | 20 I3  | 27 A11  |
|  7 NC  | 14 GND  | 21 NC  | 28 Vcc  |
|  8 NC  | 15 *WE  | 22 NC  |  1 A0  |
9 A6  | 16 01  | 23 I4  |  2 A1   |
| 10 A7 | 17 O2  | 24 A8  |  3 A2  |
| 11 I1  | 18 O3  | 25 A9  |  4 A3  |
+--------------------------------------+
 
</pre>
 
=External links=
[http://en.wikipedia.org/wiki/Static_random-access_memory SRAM page on wikipedia]


[[Image:dip20-300mil.jpg]]
=Files=
<gallery widths="150px">
File:cxk5416p.pdf|CXK5416P Datasheet
File:cy7c168a.pdf|CY7C168A Datasheet
File:idt6168sa.pdf|IDT6168SA Datasheet
File:mt5c1606.pdf|MT5C1606 Datasheet
File:p4c168.pdf|P4C168 P4C169 P4C170 Datasheet
File:p4c1681.pdf|P4C1681 P4C1682 Datasheet
</gallery>


[[Category:RAM]]
[[Category:RAM]]
[[Category:DIP20]]
[[Category:DIP20-300mil]]
[[Category:DIP22-300mil]]
[[Category:DIP24-300mil]]
[[Category:LCC28-450x450mil]]

Latest revision as of 14:00, 21 December 2017

Cross-Reference
BRAND TAG NUMBER PIN COUNT OUTPUT MARKINGS
Cypress CY 7C168 DIP20 TS CY7C168A
Integrated Dev. Tech. IDT 6168 DIP20 . IDT6168SA IDT6168LA
Micron MT 1606 DIP24 . MT5C1606
Micron MT 1607 DIP24 . MT5C1607
Pyramid Semiconductor P4C 168 DIP20 . P4C168 P4C168L
Pyramid Semiconductor P4C 169 DIP20 . P4C169
Pyramid Semiconductor P4C 170 DIP22 . P4C170
Pyramid Semiconductor P4C 1681 DIP24 LCC28 . P4C1681
Pyramid Semiconductor P4C 1682 DIP24 LCC28 . P4C1682
Sony CXK 5416 DIP20 TS CXK5416P

Static Random-Access Memory 4K x 4 (DIP20, 300mil)(DIP22, 300mil)(DIP24, 300mil)

Size

bit Byte (padded 0000xxxx) Byte (unpadded) Hex
4Kb 4KB 2KB 1000hex

Pinout

DIP24
         +---\/---+
      A4 | 1    24| Vcc
      A5 | 2    23| A3
      A6 | 3    22| A2
      A7 | 4    21| A1
      A8 | 5    20| A0
      A9 | 6    19| D4
     A10 | 7    18| D3
     A11 | 8    17| Q4
      D1 | 9    16| Q3
      D2 |10    15| Q2
     *CE |11    14| Q1
     GND |12    13| *WE
         +--------+

DIP22 (only P4C170)
         +---\/---+
      A0 | 1    22| Vcc
      A1 | 2    21| A11
      A2 | 3    20| A10
      A3 | 4    19| A9
      A4 | 5    18| A8
      A5 | 6    17| NC
      A6 | 7    16| I/O4
      A7 | 8    15| I/O3
     *CS | 9    14| I/O2
     *OE |10    13| I/O1
     GND |11    12| *WE
         +--------+

DIP20
         +---\/---+
      A4 | 1    20| Vcc
      A5 | 2    19| A3
      A6 | 3    18| A2
      A7 | 4    17| A1
      A8 | 5    16| A0
      A9 | 6    15| I/O0
     A10 | 7    14| I/O1
     A11 | 8    13| I/O2
     *CE | 9    12| I/O3
     GND |10    11| *WE
         +--------+

LCC28 (only P4C1681 P4C1682)
+--------------------------------------+
|  5 A4  | 12 I2   | 19 04   | 26 A10  |
|  6 A5  | 13 *CE  | 20 I3   | 27 A11  |
|  7 NC  | 14 GND  | 21 NC   | 28 Vcc  |
|  8 NC  | 15 *WE  | 22 NC   |  1 A0   |
|  9 A6  | 16 01   | 23 I4   |  2 A1   |
| 10 A7  | 17 O2   | 24 A8   |  3 A2   |
| 11 I1  | 18 O3   | 25 A9   |  4 A3   |
+--------------------------------------+

External links

SRAM page on wikipedia

Files