6845: Difference between revisions
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<pre> | <pre> | ||
DIP40 | DIP40 | ||
+---\/---+ | |||
Vss | 1 40| VSYNC | Vss | 1 40| VSYNC | ||
*RESET | 2 39| HSYNC | *RESET | 2 39| HSYNC | ||
Line 39: | Line 39: | ||
</gallery> | </gallery> | ||
[[Category: | [[Category:Other Chips]] | ||
[[Category:DIP40-600mil]] |
Latest revision as of 15:34, 9 November 2017
CRT Controller (CRTC)
Pinout
DIP40 +---\/---+ Vss | 1 40| VSYNC *RESET | 2 39| HSYNC LPSTB | 3 38| RA0 MA0 | 4 37| RA1 MA1 | 5 36| RA2 MA2 | 6 35| RA3 MA3 | 7 34| RA4 MA4 | 8 33| D0 MA5 | 9 32| D1 MA6 |10 31| D2 MA7 |11 30| D3 MA8 |12 29| D4 MA9 |13 28| D5 MA10 |14 27| D6 MA11 |15 26| D7 MA12 |16 25| *CS MA13 |17 24| RS Dspl En |18 23| E CURSOR |19 22| R/*W Vcc |20 21| CLK +--------+
Frequency
Set reader to FREQ, put black probe to GND, red probe to 21 to measure CPU clock, to 39 for HSYNC and to 40 for VSYNC
External links
"6809 support chips" page on CPU-World
Files
-
MC6845 Datasheet